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Von Evie Zhang

10 DFM Mistakes That Delay Your PCB Order

Most PCB delays start in the design file, not on the line. Here are the 10 DFM mistakes that trigger holds, and how to clear them before you submit.

Key Takeaways

  • The most common DFM mistakes that delay a PCB order are missing or mismatched fabrication files, no fiducials, tombstone-prone pad geometry, and parts that are out of stock or end-of-life by the time you order.
  • Most assembly holds are flagged during DFM review or first-article setup, long before any solder paste touches the board, which is exactly why a clean design file ships faster.
  • IPC-7351 land patterns and IPC-A-610 acceptance criteria are the shared language your assembler uses to judge a board, so designing to them removes ambiguity and rework.
  • Fixing these errors in CAD costs minutes; fixing them after a line stop costs days and sometimes a full board respin.

If your PCB order keeps slipping, the cause is almost always upstream: the design files, the BOM, or the footprints triggered a hold before production started. This guide is for hardware engineers and procurement managers who outsource assembly and want their boards built right the first time. Below are the 10 DFM mistakes we see most often, what each one does on the floor, and how to clear it before you submit. For the underlying principles, see our full pcb dfm guide.

1. Submitting Incomplete or Mismatched Files

The single biggest source of pcb production delays is a file package that doesn't agree with itself. A board can't be built when the Gerbers, drill file, BOM, and centroid (pick-and-place) file describe different things. Before submitting, confirm every reference designator matches a line in the BOM and a position in the centroid.

The usual culprits are a stale BOM exported before the last layout change, a missing drill file, or a centroid in the wrong units. Our checklist for gerber bom files for assembly covers the full export list. A mismatch forces your project manager to email you and wait, which is the slowest part of any build.

2. Leaving Out Fiducials

Fiducials are the optical reference marks a pick-and-place machine uses to find the board. Without them, the machine can't accurately register your layout, and fine-pitch parts land off their pads. You need at least two global fiducials on opposite corners, plus local fiducials near any fine-pitch or BGA component.

A good fiducial is a 1 mm copper dot with a 2 mm solder-mask clearance and no copper or silkscreen inside that ring. Skip them, and the assembler either adds them for you (a change you didn't approve) or stops to ask. Either way, the clock keeps running.

3. Ignoring IPC-7351 Land Patterns

Custom or borrowed footprints that don't follow IPC-7351 are a quiet source of common pcb dfm errors. A land pattern that's too small starves the joint of solder; one that's too large pulls the part sideways during reflow. IPC-7351 defines nominal, least, and most land-pattern densities so the joint forms correctly across the reflow profile.

When you pull a footprint from a vendor library or draw your own, check the pad dimensions against the IPC-7351 calculation for that package. "Fits in CAD but fails on the line" is one of the priciest surprises in assembly, because it's only caught at first article.

4. Pad Geometry That Causes Tombstoning

Tombstoning is when a small two-terminal part (an 0402 or 0201 chip) lifts vertically on one end during reflow, like a tiny headstone. It happens when one pad heats and wets faster than the other, so surface tension pulls the part upright. Asymmetric pads, uneven copper, or a thermal pad on only one end are the usual triggers.

The fix lives in the layout:

  • Keep both pads symmetric in size and thermal mass.
  • Neck down traces entering the pads so one side doesn't act as a heat sink.
  • Avoid tying one pad directly to a large copper pour without thermal relief.

Tombstones are caught at automated optical inspection (AOI), but each is a rework touch that slows the lot.

5. Components That Are Out of Stock or EOL

A perfect layout can't ship if the parts don't exist. Sourcing problems are a leading cause of pcb production delays, and they hit hardest when you specify a single manufacturer part number with no approved alternates. If that one part is on a 40-week lead time, your whole board waits.

Before you order, run your BOM through a parametric check for lifecycle status and stock, and mark which parts allow alternates. When you outsource pcb assembly china, a good partner flags a risky line item during quote rather than three weeks in, and sources genuine, traceable parts so you don't get counterfeits in place of the originals.

6. Vague or Missing BOM Detail

A BOM that lists "100nF cap" without a part number, package, or tolerance forces the assembler to guess or ask, and guessing is not allowed in production. Every line needs a manufacturer name and part number, the reference designators, quantity, and value with package size. Substitution rules belong in their own column.

The hidden cost is the back-and-forth. Each ambiguous line generates a question, each question waits for your reply, and a 200-line BOM with ten vague rows can add days. Treat the BOM as a contract, not a parts wishlist, and the build moves straight through engineering review.

7. Inadequate Spacing and Clearances

Components packed too tightly, or placed too close to the board edge, create problems that aren't visible until the panel is on the line. Connectors that overhang the rail, parts inside the routing keep-out, or two tall components that collide all force a manual fix. The board edge needs a clear margin for conveyor handling and depaneling.

Run your CAD design-rule check (DRC) with the manufacturer's capabilities loaded, not the defaults. Watch courtyard overlaps, which flag parts that physically interfere even when their copper doesn't. Spacing errors rarely stop a build outright, but they convert an automated placement into a hand placement, and hand work is slow.

8. Unmanufacturable Trace and Via Specs

Pushing trace width, spacing, or via size below your fabricator's stated capability triggers a hold and a requote. Standard fabrication handles features down to a defined minimum; ask for tighter, and you move into advanced (slower, costlier) processing. A 3 mil trace on a board that only needs 6 mil adds risk for no benefit.

Match your stackup and feature sizes to the class of board you actually need. The table below shows where typical jobs sit:

Feature Standard process Advanced process
Min trace/space 6 mil / 6 mil 3 mil / 3 mil
Min drilled via 0.3 mm 0.15 mm (laser)
Layer count 1 to 8 10+
Lead-time impact Baseline Longer

Designing to standard capability where you can is the cheapest schedule insurance there is.

9. Poor Thermal and Solder-Mask Design

Two related layout details cause real reflow trouble: thermal relief on connected pads, and solder-mask design. A pad tied to a large copper plane without thermal spokes acts as a heat sink, so it solders late and cold while neighboring joints are already done. That uneven heating shows up as cold joints and the tombstones from mistake four.

Solder-mask slivers, where mask between fine-pitch pads is too thin to print, flake off and cause bridging. Keep mask dams above your fabricator's minimum, and use thermal relief on plane-connected pads. These are the kinds of details a pcb assembly process walkthrough makes concrete, because they only matter once heat is applied.

10. No Assembly Notes or Polarity Marks

The last common mistake is leaving the assembler to interpret your intent. Pin-1 indicators, polarity marks for diodes and electrolytics, and clear connector orientation prevent the worst defect of all: a fully built board populated backward. Silkscreen hidden under the part doesn't help an inspector; the marking has to be visible after placement.

Add a short assembly drawing or notes file that states IPC-A-610 class, special handling, and orientation for anything that could go in two ways. IPC-A-610 (current revision J, 2024) is the acceptance standard inspectors judge your board against, so naming the target class removes guesswork.

Frequently Asked Questions

What is the most common DFM mistake in PCB design?

The most common DFM mistake is submitting incomplete or mismatched fabrication files, where the Gerbers, BOM, and pick-and-place file don't agree with each other. The assembler can't build a board whose files contradict themselves, so the order stalls in engineering review until you send a corrected, internally consistent package.

How do DFM errors actually delay a PCB order?

DFM errors delay orders by triggering a hold during design review or first-article setup, before production starts. Each issue generates a question to you, and the build waits for your reply. A handful of ambiguous BOM lines or missing fiducials can add days simply through back-and-forth, not machine time.

What is tombstoning and how do I prevent it?

Tombstoning is when a small chip component lifts on one end during reflow because its two pads heat unevenly. Prevent it by keeping both pads symmetric in size and thermal mass, necking down traces into the pads, and adding thermal relief instead of connecting one pad directly to a large copper pour.

Do I need fiducials on every PCB?

You need fiducials on any board that will be assembled by an automated pick-and-place machine, which is nearly all surface-mount work. Use at least two global fiducials on opposite corners, and add local fiducials beside fine-pitch or BGA parts. Without them, the machine can't register your layout precisely and fine-pitch placement drifts.

What standards should my PCB design follow for assembly?

Design land patterns to IPC-7351, which defines correct pad geometry per package, and specify your acceptance class against IPC-A-610 (current revision J, 2024), the standard inspectors use to judge solder joints and assembly quality. Naming these standards in your notes gives the assembler an unambiguous target and reduces rework.

How early are DFM problems usually caught?

Most DFM problems are caught during the assembler's DFM review or at first-article setup, well before solder paste is applied. That timing is good news: an error caught in review costs an email, while the same error caught after a line stop can cost days of rework or a board respin.

Build It Right the First Time

DFM is not busywork. Every item on this list is a place where a few minutes in CAD save you days on the schedule. Tighten your files, ground your footprints in IPC-7351, and mark your board clearly, and most holds disappear before they happen.

Want a second set of engineering eyes on your design before production? Talk to our team. We run DFM review on every project, functionally test each board before it ships, and assign you a dedicated English-speaking project manager so questions get answered in hours, not weeks.